Embodiments of the present invention relate to a multi-chip package, and more particularly to a multi-chip package including a plurality of inner package chips each of which includes a pad circuit capable of stably providing internal circuits with a voltage received from an external lead.
A multi-chip packaging technology has been proposed to package many chips in a single package as electronic devices become super-miniaturized. A multi-chip package is more preferable in terms of weight and size than a single-chip package.
In order to drive a plurality of different chips in the multi-chip package, different addresses are assigned to individual chips such that each chip can be operated selectively. For example, assuming that the multi-chip package includes four chips, a first address ‘00’ may be assigned to a first chip, a second address ‘01’ may be assigned to a second chip, a third address ‘10’ may be assigned to a third chip, and a fourth address ‘11’ may be assigned to a fourth chip in such a manner that a desired chip from among the four chips can be selected.